Jobs in India

Job Description: Good knowledge of VLSI process and device characteristics. Experience doing physical design targeted to the 7nm/16nm FinFet process.

Job Description: Experience of building Test benches from scratch. Highly motivated, self-starter with good interpersonal skills and a strong team player.

Job Description: Hands-on experience in developing Analog Layout /IO layout design. Good exposure on FinFet layouts in lower nodes.

Job Description: Knowledge of various DFT technologies for example JTAG, Mbist, Scan. Experience with RTL Coding- Verilog, System Verilog, VHDL.

Job Description: Deep understanding of Circuit design/ physical design of Analog Designs on advanced process technologies. Expertise in analogy design of blocks like Analog to…

Job Description: RTL / Logic Development in VHDL/Verilog. Full FPGA development flow from logic design, place route, timing analysis closure.

Job Description: Experienced in RTL design using Verilog / System Verilog. ASIC designers with experiences in all aspects of RTL design flow from Specification/Microarchitecture…