Jobs in India

Job Description: Proficient in Constrained Random verification, Coverage Closure. VLSI Design & Verification Flow. Proficient in System Verilog.

Job Description: CPU verification is added advantage. 1 or more years of experience in Verification with hands on in ASIC Verification, SV/UVM methodology.

Job Description: Relevant FPGA/ASIC engineering design and verification experience are entertained. Strong knowledge of ASIC and/or FPGA design methodology and should be well…

Job Description: 4. The person needs to have a good understanding of the basic building blocks of an ASIC/FPGA design. Semifront Technologies, Kolkata, is looking for folks who…

Job Description: Creating micro-architecture and detailed design documents for SoC Subsystem design keeping in mind performance, power, area requirements.

Job Description: Responsible for design verification at chip level ensuring design meets architectural / system requirements. Experience in advanced verification languages such…

Job Description: Mtech/ Btech in EC/EE/AE/EI/CS (course completed). Good understanding in hardware Design. Basic knowledge in any of the above mentioned fields.

Job Description: Understanding of Digital design principles. Creating micro-architecture and detailed design documents for SoC Subsystem design keeping in mind performance,…

Job Description: Knowledge in low power verification. Expertise in scripting languages like Perl, Python, Tcl to achieve automation of verification methodologies and flows.

Job Description: Strong in digital design fundamentals. Expertise in micro architecture development, design, RTL Coding & integration of IP blocks in ASIC/SoC designs.

Job Description: G. Ability to work with local and remote teams Design verification and physical design teams. A. Proven hands-on experience with IP designs.

Job Description: Should have owned verification of IP/Subsystem/SOC level verification like,. Background in FFT/LDPC/ Digital filter design is desirable.

Job Description: Looking for Engineers with more than 3+ years of experience in the field of VLSI Design, Architecture definition and Verification.

Job Description: Actively explores innovative methods for verification and validation of these platform designs using automated infrastructure and reduced/smaller designs.

Job Description: BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE. Block level floor planning, power planning and IR drop analysis. Multimode multi corner optimization and closure.

Job Description: Proven track record of successful ASIC designs from design to production in leading-edge technology. Expertise in micro architecture development, design, RTL…

Job Description: Collaborate with architecture, design, front end, and CAD teams to deliver high-quality physical designs. Ceremorphic AI hardware combines knowledge across many…

Job Description: Work closely with functional verification teams for debug and verification of features. Develop specification and work towards micro-architecture of design…

Job Description: Understanding of complete functional verification cycle will be added advantage. Experience on verification closure by closing Coverage and bug reports.

Job Description: Perform module-level verification and lint checking. Strong hands-on experience with Verilog design. Do RTL-level design for any digital logic.

Job Description: High Speed DDR/HBM Layout design. Familiarity with ASIC physical design flow: LEF generation, Place & Route & understanding of top level verification flow, DRC…

Job Description: 3+ years of design experience. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, Verdi).

Job Description: Understanding of cross-domain involving domain validation, design for testing, physical design, and software.

Job Description: Hands on experience in digital ASIC/FPGA design and verification. Experience leading teams of specific sub systems for design and verification engineers,…

Job Description: Responsible for all aspects of physical design and implementation. Should be familiar with low-power design and their impact on Back end flow (power switches /…